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| | * [[CoE 197U The MOS Transistor | The MOS Transistor]] | | * [[CoE 197U The MOS Transistor | The MOS Transistor]] |
| | * [[CoE 197U The MOS Switch | The MOS Switch]] | | * [[CoE 197U The MOS Switch | The MOS Switch]] |
| − | * [[CoE 197U The CMOS Inverter | CMOS Inverter]] | + | * [[CoE 197U CMOS Inverter | The CMOS Inverter]] |
| | | | | | |
| | * Simplify the analysis of a CMOS inverter using switch-level transistor models. | | * Simplify the analysis of a CMOS inverter using switch-level transistor models. |
Revision as of 18:19, 6 February 2022
- Introduction to Analog and Digital Integrated Circuit Design
- Semester Offered: 2nd semester
- Course Credit: Lecture: 3 units (2 units lecture, 1 unit lab)
Catalog Description
IC Fabrication. CMOS gates. Logical Effort. Interconnect. Memory Elements. MOS Amplifiers. Current Sources. Differential Amplifiers. Operational Transconductance Amplifiers. Pre-req: EEE 41 or EEE 131. 5h (2 lec, 3 lab) 3 u.
Syllabus
| Module
|
Topics
|
Outcomes
|
Resources
|
Activities
|
| Part I: Digital Integrated Circuits
|
| 1
|
|
- Identify the key characteristics and non-idealities of a CMOS fabrication process.
- Analyze how these key characteristics and non-idealities change the characteristics of the devices that will be built on it.
|
|
|
| 2
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|
- Simplify the analysis of a CMOS inverter using switch-level transistor models.
- Determine key CMOS inverter metrics and understand their significance in the analysis and design process.
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|
- Lab 02: The MOSFET Switch and The Inverter
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| 3
|
|
- Design CMOS static gates
- Estimate delays of cascaded logic gates
- Design multistage networks for optimal speed
|
- Slides: CMOS Gates PDF
- Slides: Logical Effort PDF
|
- CoE197U-A3.1: Logical Effort
- Lab 03: Inverter Characteristics, Ring Oscillator, and Buffers
|
| 4
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|
- Identify sources of power and energy consumption in digital circuits
- Evaluate energy efficient techniques for digital logic using defined metrics
- Model interconnects as parasitic resistances and capacitances and estimate corresponding delay
|
- Slides: Power and Energy PDF
- Slides: Interconnects PDF
|
- Lab 04 : Static Logic Gates and Logical Effort
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| 5
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|
- Enumerate and distinguish different memory element classifications
- Identify timing parameters relevant to memory elements and their effects on sequential circuit timing
- Design and characterize basic memory elements
|
- Slides: Memory PDF
- Slides: Timing PDF
- Slides: Timing Discussion PDF
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|
| Part II: Analog Integrated Circuits
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| 6
|
- MOS Amplifiers: DC and AC Analysis
|
- Determine the DC operating point of MOS amplifiers.
- Extract the MOS small-signal parameters depending on the DC operating point.
- Analyze MOS amplifiers in the AC and DC domain.
- Derive the two-port network representation of MOS amplifiers.
- Identify the appropriate application of a MOS amplifier topology based on its two-port parameters.
|
|
|
| 7
|
- MOS Amplifiers: Frequency Response
|
- Analyze MOS amplifiers in the frequency domain.
- Sketch the Bode plots of the transfer function.
- Estimate the dominant pole using ZVTCA.
|
|
|
| 8
|
- Current Sources
- High-Swing Current Sources
|
- Understand ideal and real sources
- Analyze MOS simple current mirror
- Analyze High-swing current sources
|
- Slides: Current Sources PDF
- Slides: High-Swing Current Sources PDF
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|
| 9
|
|
- Understand differential circuits
- Analyze MOS differential pairs
- Understand operational amplifier operation
- Analyze Miller Operational Amplifiers
|
- Slides: MOS Differential Pairs PDF
- Slides: Miller Op-Amp PDF
|
|
| 10
|
- Folded Cascode Operational Transconductance Amplifiers
|
- Identify the different stages in a folded cascode OTA.
- Determine the components and/or parameters that affect the DC operating point of a folded cascode OTA.
- Explain how to design a folded cascode OTA.
|
- Slides: Folded Cascode PDF
|
|
References
- Rabaey, Chandrakasan, Nikolic, Digital Integrated Circuits, 2ed., Pearson 2002.
- Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
- Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.
- Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.
- R. Jacob Baker, Circuit Design, Layout,and Simulation, 4ed., IEEE Press 2019.
