CoE 197U S2 AY 2023-2024

• Introduction to Analog and Digital Integrated Circuit Design
• Semester Offered: 2nd semester
• Course Credit: Lecture: 3 units (2 units lecture, 1 unit lab)

Catalog Description

IC Fabrication. CMOS gates. Logical Effort. Interconnect. Memory Elements. MOS Amplifiers. Current Sources. Differential Amplifiers. Operational Transconductance Amplifiers.

Pre-req: EEE 41 or EEE 131. 5h (2 lec, 3 lab) 3 u.

Schedule of Classes

Lecture: WF 10-11 am

Laboratory: M 10am-1 pm OR Th 2:30-5:30

Mode of Delivery

For lecture, it will be a mix of face-to-face, and synchronous and asynchronous remote learning.

For laboratory, it will be face-to-face at Rm 403.

Syllabus

Module	Topics	Outcomes	Resources	Activities
Part I: Digital Integrated Circuits
0	Feb 12-16 CoE 197U Orientation Introduction IC Fabrication	Set class expectations, discuss grading system Introduction to CoE 197U Identify the key characteristics and non-idealities of a CMOS fabrication process.	Video: Silicon Run I (1996) Youtube link	Lab orientation
1	Feb 19-23 Scaling The MOS Switch The MOS Transistor	Analyze how key characteristics and non-idealities change the characteristics of the devices that will be built on it.	Slides: [Scaling] Video: [Scaling recoding] Slides: [MOS]	Lab 01: Introduction to Digital IC Design (MOS Characterization)
2	Feb 26-Mar 1 The CMOS Inverter Static CMOS Gates	Simplify the analysis of a CMOS inverter using switch-level transistor models. Determine key CMOS inverter metrics and understand their significance in the analysis and design process. Design CMOS static gates	Slides: [CMOS Inverter] Slides: [CMOS Gates] Video: [CMOS Gates Lecture]	Lab 02: CMOS Inverter
3	Mar 4-8 Logical Effort and Delay	Estimate delays of cascaded logic gates Design multistage networks for optimal speed	Slides: Logical Effort [PDF]	Lab 03: Static CMOS Gates and Delay Optimization
4	Mar 11-15 Power and Energy Interconnects	Identify sources of power and energy consumption in digital circuits Evaluate energy efficient techniques for digital logic using defined metrics Model interconnects as parasitic resistances and capacitances and estimate corresponding delay	Slides: Power and Energy [PDF] Slides: Interconnects [PDF]	Lab 04: Considerations in Digital Design
5	Mar 18-22 Memory Elements Timing	Enumerate and distinguish different memory element classifications Identify timing parameters relevant to memory elements and their effects on sequential circuit timing Design and characterize basic memory elements	Slides: Memory [PDF] Slides: Timing [PDF] Slides: Optional materials [PDF] Video: Module discussion [Link] 2019 Exam: [PDF]	Lab (Optional): Memory and Timing
March 23: Long Exam 1
Part II: Analog Integrated Circuits
6	Apr 12-19 MOS Amplifiers: DC and AC Analysis	Revisit transistor models used for analog circuit design. Identify the limitations of the square-law model. Learn the model-based design methodology. Determine the DC operating point of MOS amplifiers. Extract the MOS small-signal parameters depending on the DC operating point. Analyze MOS amplifiers in the AC and DC domain. Derive the two-port network representation of MOS amplifiers. Identify the appropriate application of a MOS amplifier topology based on its two-port parameters.	Slides: Transistor Models [PDF] Slides: Model-Based Design [PDF] Slides: DC and AC Analysis of Single-Stage Amplifiers [PDF] Old Slides: DC and AC Analysis [PDF] Old Videos: Part 1 Part 2	Lab 05: Introduction to Analog IC Design (MOS Characterization)
7	Apr 22-26 MOS Amplifiers: Frequency Response	Analyze MOS amplifiers in the frequency domain. Sketch the Bode plots of the transfer function. Estimate the dominant pole using ZVTCA.	Slides: Frequency Response Part 1 [PDF] Slides: Frequency Response Part 2 [PDF] Old Slides: Frequency Response [PDF] Old Videos: Part 1 Part 2 Part 3	Lab 06: Common-Source Amplifier with Resistive Load
8	May 3-8 Current Sources High-Swing Current Sources	Understand ideal and real sources Analyze MOS simple current mirror Analyze High-swing current sources	Old Slides: Current Sources [PDF] [Annotated PDF] Old Slides: High-Swing Current Sources [PDF] [Annotated PDF] Old Videos: Part 1 Part 2	Lab 07: Current Sources
9	May 10-15 MOS Differential Pairs Two-Stage MOS OTA	Understand differential circuits Analyze MOS differential pairs Understand operational amplifier operation Analyze Miller Operational Amplifiers	Old Slides: MOS Differential Pairs [PDF] Old Slides: Miller Op-Amp [PDF] Old Videos: Part 1 Part 2	Lab 08: Differential Amplifier
10	May 17-22 Folded Cascode Operational Transconductance Amplifiers	Identify the different stages in a folded cascode OTA. Determine the components and/or parameters that affect the DC operating point of a folded cascode OTA. Explain how to design a folded cascode OTA.	Old Slides: Folded Cascode [PDF]	Lab 09: Design Project
May 29: Long Exam 2

Announcements

Feb 19: Read scaling and MOS switch for Wednesday's (Feb 21) asynch activity. We will have face-to-face discussion on Friday (Feb 23)

Feb 16: Check instructions in UVLe for today's activity

Grade distribution

60% Laboratory

30% Long Exams

10% Lecture Class Participation

References

• Rabaey, Chandrakasan, Nikolic, Digital Integrated Circuits, 2ed., Pearson 2002.
• Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
• Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.
• Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.
• R. Jacob Baker, Circuit Design, Layout,and Simulation, 4ed., IEEE Press 2019.