Difference between revisions of "CoE 197U S2 AY 2022-2023"
Jump to navigation
Jump to search
(8 intermediate revisions by the same user not shown) | |||
Line 129: | Line 129: | ||
* Identify the appropriate application of a MOS amplifier topology based on its two-port parameters. | * Identify the appropriate application of a MOS amplifier topology based on its two-port parameters. | ||
| | | | ||
− | * Slides: DC and AC Analysis [https://drive.google.com/file/d/1J5bNkvjyJ5dF0HWpcLABiQq9WOlnyqje/view?usp=sharing PDF] | + | * Slides: DC and AC Analysis [[https://drive.google.com/file/d/1J5bNkvjyJ5dF0HWpcLABiQq9WOlnyqje/view?usp=sharing PDF]] |
* Videos: [https://www.youtube.com/watch?v=4tEYeFiYwWI&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=1 Part 1] [https://www.youtube.com/watch?v=lD7ejAl4Ue4&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=2 Part 2] | * Videos: [https://www.youtube.com/watch?v=4tEYeFiYwWI&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=1 Part 1] [https://www.youtube.com/watch?v=lD7ejAl4Ue4&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=2 Part 2] | ||
| | | | ||
Line 143: | Line 143: | ||
* Estimate the dominant pole using ZVTCA. | * Estimate the dominant pole using ZVTCA. | ||
| | | | ||
− | * Slides: Frequency Response [https://drive.google.com/file/d/1IA9OF95XS4FV852IuIpbY5iy1KquA4VI/view?usp=sharing PDF] | + | * Slides: Frequency Response [[https://drive.google.com/file/d/1IA9OF95XS4FV852IuIpbY5iy1KquA4VI/view?usp=sharing PDF]] |
* Videos: [https://www.youtube.com/watch?v=1AzlCV_AXgg&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=3 Part 1] [https://www.youtube.com/watch?v=I3I6CBye0rU&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=4 Part 2] [https://www.youtube.com/watch?v=55w6EXRSR1M&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=5 Part 3] | * Videos: [https://www.youtube.com/watch?v=1AzlCV_AXgg&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=3 Part 1] [https://www.youtube.com/watch?v=I3I6CBye0rU&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=4 Part 2] [https://www.youtube.com/watch?v=55w6EXRSR1M&list=PL4if6jkKNTz9RgsB4Gq_g374b4oLYOAeH&index=5 Part 3] | ||
| | | | ||
Line 158: | Line 158: | ||
* Analyze High-swing current sources | * Analyze High-swing current sources | ||
| | | | ||
− | * Slides: Current Sources [https://drive.google.com/file/d/19jU1NupCk66ta6Q3tJyWFYDUagqaZCQs/view?usp=sharing PDF] [https://drive.google.com/file/d/ | + | * Slides: Current Sources [[https://drive.google.com/file/d/19jU1NupCk66ta6Q3tJyWFYDUagqaZCQs/view?usp=sharing PDF]] [[https://drive.google.com/file/d/1LQBAYGi4V2OVDtcDEwU78ianL_LD4PTk/view?usp=sharing Annotated PDF]] |
− | * Slides: High-Swing Current Sources [https://drive.google.com/file/d/15dsEE2jcVoUNasZmvCOlewN77UxfOieB/view?usp=sharing PDF] | + | * Slides: High-Swing Current Sources [[https://drive.google.com/file/d/15dsEE2jcVoUNasZmvCOlewN77UxfOieB/view?usp=sharing PDF]] [[https://drive.google.com/file/d/1jtwEvsdZ9uWTYQ969RcQXfwyGtOSCOSL/view?usp=sharing Annotated PDF]] |
+ | * Videos: [https://drive.google.com/file/d/1vxGdeB_VRUoyA5G4XotYUWxmBPFhXjyN/view?usp=sharing Part 1] [https://drive.google.com/file/d/11cjEGTWBCXKZ92Op4luxM3MMGThBXPbH/view?usp=sharing Part 2] | ||
| | | | ||
* [https://drive.google.com/file/d/1rsYqGJ-TgIk8yMkPa9z_3Q-l3CnkicFH/view?usp=sharing Lab 07]: Current Sources | * [https://drive.google.com/file/d/1rsYqGJ-TgIk8yMkPa9z_3Q-l3CnkicFH/view?usp=sharing Lab 07]: Current Sources | ||
Line 174: | Line 175: | ||
* Analyze Miller Operational Amplifiers | * Analyze Miller Operational Amplifiers | ||
| | | | ||
− | * Slides: MOS Differential Pairs [https://drive.google.com/file/d/10p4T9_5qMXiXPeVU0B0yHmzmtTabiQ43/view?usp=sharing PDF] | + | * Slides: MOS Differential Pairs [[https://drive.google.com/file/d/10p4T9_5qMXiXPeVU0B0yHmzmtTabiQ43/view?usp=sharing PDF]] |
− | * Slides: Miller Op-Amp [https://drive.google.com/file/d/1ARDhJZ5SXZ9aMOgDCBVHqwkQAiG0FLsn/view?usp=sharing PDF] | + | * Slides: Miller Op-Amp [[https://drive.google.com/file/d/1ARDhJZ5SXZ9aMOgDCBVHqwkQAiG0FLsn/view?usp=sharing PDF]] |
+ | * Videos: [https://drive.google.com/file/d/1XRNRW5x2GmhDsvfyZ-iOt5JvisZaJ-bl/view?usp=sharing Part 1] [https://drive.google.com/file/d/1zOlnA7GNCBQdeKf0cumAQtAe31QDAqoE/view?usp=sharing Part 2] | ||
| | | | ||
* [https://drive.google.com/file/d/1s5JjDhKb_ABXVH0q5yfaU6gc7DEHRKwt/view?usp=sharing Lab 08]: Differential Amplifier | * [https://drive.google.com/file/d/1s5JjDhKb_ABXVH0q5yfaU6gc7DEHRKwt/view?usp=sharing Lab 08]: Differential Amplifier | ||
Line 188: | Line 190: | ||
* Explain how to design a folded cascode OTA. | * Explain how to design a folded cascode OTA. | ||
| | | | ||
− | * Slides: Folded Cascode [https://drive.google.com/file/d/1Tg0ZyYzh-rQPGdOqmonEXNXNYPkhJ-aW/view?usp=sharing PDF] | + | * Slides: Folded Cascode [[https://drive.google.com/file/d/1Tg0ZyYzh-rQPGdOqmonEXNXNYPkhJ-aW/view?usp=sharing PDF]] |
| | | | ||
− | * Lab 09: Design Problem | + | * [https://drive.google.com/file/d/1p-kByLuiUuwYC7jlVHQ0AdCqLzhQIvzx/view?usp=sharing Lab 09]: Design Problem |
|- | |- | ||
|} | |} |
Latest revision as of 11:02, 16 June 2023
- Introduction to Analog and Digital Integrated Circuit Design
- Semester Offered: 2nd semester
- Course Credit: Lecture: 3 units (2 units lecture, 1 unit lab)
Catalog Description
IC Fabrication. CMOS gates. Logical Effort. Interconnect. Memory Elements. MOS Amplifiers. Current Sources. Differential Amplifiers. Operational Transconductance Amplifiers.
Pre-req: EEE 41 or EEE 131. 5h (2 lec, 3 lab) 3 u.
Syllabus
Module | Topics | Outcomes | Resources | Activities |
---|---|---|---|---|
Part I: Digital Integrated Circuits | ||||
0 |
Feb 13-18
|
|
|
|
1 |
Feb 20-25 |
|
|
|
2 |
Mar 6-11 |
|
| |
3 |
Mar 13-18 |
|
||
4 |
Mar 20-25
|
|
|
|
5 |
Mar 20-25 |
|
| |
Part II: Analog Integrated Circuits | ||||
6 |
Apr 17-22
|
|
| |
7 |
Apr 24-29
|
|
| |
8 |
May 8-13
|
|
|
|
9 |
May 15-20 |
|
| |
10 |
May 22-27
|
|
|
|
References
- Rabaey, Chandrakasan, Nikolic, Digital Integrated Circuits, 2ed., Pearson 2002.
- Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
- Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.
- Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.
- R. Jacob Baker, Circuit Design, Layout,and Simulation, 4ed., IEEE Press 2019.