Difference between revisions of "CoE 197U S2 AY 2022-2023"

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* [[CoE197U-A1.1]]: IC Fabrication and Scaling
 
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//* [https://uvle.upd.edu.ph/mod/resource/view.php?id=144085 Lab 01]: Introduction to LTSpice
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* [https://uvle.upd.edu.ph/mod/resource/view.php?id=144085 Lab 01]: Introduction to LTSpice
 
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Revision as of 16:50, 26 February 2023

  • Introduction to Analog and Digital Integrated Circuit Design
  • Semester Offered: 2nd semester
  • Course Credit: Lecture: 3 units (2 units lecture, 1 unit lab)

Catalog Description

IC Fabrication. CMOS gates. Logical Effort. Interconnect. Memory Elements. MOS Amplifiers. Current Sources. Differential Amplifiers. Operational Transconductance Amplifiers.

Pre-req: EEE 41 or EEE 131. 5h (2 lec, 3 lab) 3 u.

Syllabus

Module Topics Outcomes Resources Activities
Part I: Digital Integrated Circuits
0

Feb 13-18

  • CoE 197U Orientation
  • Set class expectations, discuss grading system
  • Introduction to CoE 197U
  • Syllabus [ PDF]
  • Lab orientation
1

Feb 20-25

  • Identify the key characteristics and non-idealities of a CMOS fabrication process.
  • Analyze how these key characteristics and non-idealities change the characteristics of the devices that will be built on it.
2

Feb 27-Mar 4

  • Simplify the analysis of a CMOS inverter using switch-level transistor models.
  • Determine key CMOS inverter metrics and understand their significance in the analysis and design process.
  • Slides: MOS [ PDF]
  • Slides: CMOS Inverter [ PDF]
  • Lab 02: The MOSFET Switch and The Inverter
3

Mar 6-11

  • Design CMOS static gates
  • Estimate delays of cascaded logic gates
  • Design multistage networks for optimal speed
  • Slides: CMOS Gates [ PDF]
  • Slides: Logical Effort [ PDF]
  • CoE197U-A3.1: Logical Effort
  • Lab 03: Inverter Characteristics, Ring Oscillator, and Buffers
4

Mar 13-18

  • Identify sources of power and energy consumption in digital circuits
  • Evaluate energy efficient techniques for digital logic using defined metrics
  • Model interconnects as parasitic resistances and capacitances and estimate corresponding delay
  • Slides: Power and Energy [ PDF]
  • Slides: Interconnects [ PDF]
  • Lab 04 : Static Logic Gates and Logical Effort
5

Mar 20-25

  • Enumerate and distinguish different memory element classifications
  • Identify timing parameters relevant to memory elements and their effects on sequential circuit timing
  • Design and characterize basic memory elements
  • Slides: Memory [ PDF]
  • Slides: Timing [ PDF]
Part II: Analog Integrated Circuits
6

Apr 17-22

  • MOS Amplifiers: DC and AC Analysis
  • Determine the DC operating point of MOS amplifiers.
  • Extract the MOS small-signal parameters depending on the DC operating point.
  • Analyze MOS amplifiers in the AC and DC domain.
  • Derive the two-port network representation of MOS amplifiers.
  • Identify the appropriate application of a MOS amplifier topology based on its two-port parameters.
  • Lab 06: Introduction to Analog Design
7

Apr 24-29

  • MOS Amplifiers: Frequency Response
  • Analyze MOS amplifiers in the frequency domain.
  • Sketch the Bode plots of the transfer function.
  • Estimate the dominant pole using ZVTCA.
  • Lab 07: CS Amplifier and Frequency Response
8

May 8-13

  • Current Sources
  • High-Swing Current Sources
  • Understand ideal and real sources
  • Analyze MOS simple current mirror
  • Analyze High-swing current sources
  • Slides: Current Sources PDF
  • Slides: High-Swing Current Sources PDF
  • Lab 08: Current Mirrors and CS Amplifiers with Active Loads
9

May 15-20

  • Understand differential circuits
  • Analyze MOS differential pairs
  • Understand operational amplifier operation
  • Analyze Miller Operational Amplifiers
  • Slides: MOS Differential Pairs PDF
  • Slides: Miller Op-Amp PDF
  • Lab 09: Differential Pairs and Two-Stage MOS OTA
10

May 22-27

  • Folded Cascode Operational Transconductance Amplifiers
  • Identify the different stages in a folded cascode OTA.
  • Determine the components and/or parameters that affect the DC operating point of a folded cascode OTA.
  • Explain how to design a folded cascode OTA.
  • Slides: Folded Cascode PDF
  • Lab 10: (Project) Design of a Folded Cascode OTA

References

  • Rabaey, Chandrakasan, Nikolic, Digital Integrated Circuits, 2ed., Pearson 2002.
  • Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
  • Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.
  • Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.
  • R. Jacob Baker, Circuit Design, Layout,and Simulation, 4ed., IEEE Press 2019.