Difference between revisions of "Passive CMOS Devices"

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Passive devices such as resistors, capacitors, and inductors, are commonly used in biasing circuits, feedback networks, and signal or energy storage blocks. However, these passive devices, when built on fabrication processes that are optimized for transistors, may have characteristics different from their ideal or discrete counterparts. In this module, we examine the behavior of passive devices built alongside CMOS transistors.  
 
Passive devices such as resistors, capacitors, and inductors, are commonly used in biasing circuits, feedback networks, and signal or energy storage blocks. However, these passive devices, when built on fabrication processes that are optimized for transistors, may have characteristics different from their ideal or discrete counterparts. In this module, we examine the behavior of passive devices built alongside CMOS transistors.  
  
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== Resistors ==
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We will divide this module into the following sections:
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In standard digital CMOS processes, there is usually no provision for high resistance layers, since resistances are typically deemed bad for digital circuits. But in analog design, we often need well-controlled resistors, with relatively large resistance values. In order to evaluate if a particular layer could be used as to build a resistor, we look to their sheet resistance. Recall that for a resistor:
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* [[Integrated Resistors]]
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* [[Integrated Capacitors]]
  
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{{NumBlk|::|<math>R = \frac{\rho \cdot \ell}{A} = \frac{\rho}{t}\frac{\ell}{w}= R_\mathrm{sh} \frac{\ell}{w}</math>|{{EquationRef|1}}}}
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Read the two modules above, the do the activity below.
  
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Where <math>R_\mathrm{sh}</math> is the ''sheet resistance'' of the layer, <math>\rho</math> is the resistivity of the material, <math>\ell</math> is the length along the direction of the current, and <math>A = w\cdot t</math>, is the cross sectional area normal to the current flow, which is equal to the product of the layer thickness, <math>t</math> and <math>w</math> is the width of the layer perpendicular to the current flow. The table below shows indicative values of the common conductive layers in a CMOS process:
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{{Note|[[220-A2.1 | '''Activity A2.1''' Integrated Resistors and Capacitors]] -- This activity walks you through the analysis and simulation of integrated RC circuits.|reminder}}
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{| class="wikitable"
 
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! Layer
 
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! Sheet Resistance
 
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|-
 
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| Metal
 
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| <math>50-70\,\mathrm{m\Omega/\square} \pm 30\mathrm{%}</math>
 
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|-
 
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| Polysilicon
 
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| <math>5\,\mathrm{m\Omega/\square}</math>
 
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|-
 
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| <math>n^+</math> or <math>p^+</math> Diffusion
 
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| <math>5\,\mathrm{m\Omega/\square}</math>
 
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|-
 
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| <math>n</math>-well
 
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| <math>1-5\,\mathrm{m\Omega/\square} \pm 40\mathrm{%}</math>
 
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|-
 
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|}
 
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== Capacitors ==
 
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== Inductors ==
 

Latest revision as of 15:25, 22 September 2020

Passive devices such as resistors, capacitors, and inductors, are commonly used in biasing circuits, feedback networks, and signal or energy storage blocks. However, these passive devices, when built on fabrication processes that are optimized for transistors, may have characteristics different from their ideal or discrete counterparts. In this module, we examine the behavior of passive devices built alongside CMOS transistors.

We will divide this module into the following sections:

Read the two modules above, the do the activity below.

Activity A2.1 Integrated Resistors and Capacitors -- This activity walks you through the analysis and simulation of integrated RC circuits.
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