Difference between revisions of "EE 220"
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! scope="col"| Outcomes | ! scope="col"| Outcomes | ||
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! scope="col"| Activities | ! scope="col"| Activities | ||
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[[CMOS Technology and Fabrication]] | [[CMOS Technology and Fabrication]] | ||
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* Video: Silicon Run I (1996) [https://www.youtube.com/watch?v=3XTWXRj24GM Youtube link] | * Video: Silicon Run I (1996) [https://www.youtube.com/watch?v=3XTWXRj24GM Youtube link] | ||
− | * | + | * [[ngspice Tutorial]] |
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− | * [[220-A1.1]]: IC | + | * [[220-A1.1]]: IC fabrication |
− | * [[220-A1.2]]: | + | * [[220-A1.2]]: A Wideband Voltage Divider Circuit |
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− | | 2 | + | | style="text-align:center;" | 2 |
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[[Passive CMOS Devices]] | [[Passive CMOS Devices]] | ||
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* Verify these effects via circuit simulation. | * Verify these effects via circuit simulation. | ||
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+ | * Spyder IDE [https://www.spyder-ide.org/ website] | ||
+ | * [[Using Python with ngspice]] | ||
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− | * [[220-A2.1]]: | + | * [[220-A2.1]]: Integrated Resistors and Capacitors |
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− | | 3 | + | | style="text-align:center;" | 3 |
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[[MOS Transistors]] | [[MOS Transistors]] | ||
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* Transistor Models | * Transistor Models | ||
+ | * Short-Channel Effects | ||
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* Identify, model, and analyze the effects of CMOS process parameters on the characteristics of MOS transistors. | * Identify, model, and analyze the effects of CMOS process parameters on the characteristics of MOS transistors. | ||
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* Arizona State University Predictive Technology Models (PTM) [http://ptm.asu.edu/ website] | * Arizona State University Predictive Technology Models (PTM) [http://ptm.asu.edu/ website] | ||
+ | * SkyWater [[SKY130 Models]] (130nm CMOS) | ||
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* [[220-A3.1]]: MOS characteristic curves simulation | * [[220-A3.1]]: MOS characteristic curves simulation | ||
− | * [[220-A3.2]]: MOS | + | * [[220-A3.2]]: Extracting MOS small-signal parameters |
− | * [[220-A3.3]]: | + | * [[220-A3.3]]: The MOS transition frequency |
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− | [[Model-Based Design]] | + | [[Model-Based Analog Circuit Design]] |
+ | * Small-Signal Model | ||
+ | * <math>\tfrac{g_m}{I_D}</math> and <math>V^*</math> | ||
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− | * Design simple single-transistor amplifiers using SPICE models as | + | * Design simple single-transistor amplifiers using SPICE models as an alternative to closed-form models. |
* Verify these designs via circuit simulation. | * Verify these designs via circuit simulation. | ||
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− | * [[220-A4.1]]: Design a | + | * [[220-A4.1]]: MOS Intrinsic Gain |
+ | * [[220-A4.2]]: Simulating <math>\tfrac{g_m}{I_D}</math> | ||
+ | * [[220-A4.3]]: Design of a Simple Common-Source Amplifier | ||
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− | | 5 | + | | style="text-align:center;" | 5 |
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[[Electronic Noise]] | [[Electronic Noise]] | ||
− | * | + | * [[Resistor Noise]] |
− | * | + | * [[Diode and Transistor Noise]] |
− | * | + | * [[EE 220 Noise Analysis | Noise Analysis]] |
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* Identify the fundamental types of electronic noise and differentiate one noise type from another. | * Identify the fundamental types of electronic noise and differentiate one noise type from another. | ||
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* [[220-A5.2]]: Amplifier output noise and input-referred noise | * [[220-A5.2]]: Amplifier output noise and input-referred noise | ||
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[[Operational Transconductance Amplifiers (OTAs)]] | [[Operational Transconductance Amplifiers (OTAs)]] | ||
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* [[220-A6.1]]: Transient response of an OTA with capacitive feedback | * [[220-A6.1]]: Transient response of an OTA with capacitive feedback | ||
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[[Differential Circuits]] | [[Differential Circuits]] | ||
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− | [[220-A7.1]]: Differential-mode amplifier gains | + | * [[220-A7.1]]: Differential-mode amplifier gains |
− | [[220-A7.2]]: Common-mode Rejection Ratio | + | * [[220-A7.2]]: Common-mode Rejection Ratio |
+ | * [[220-A7.3]]: Input-referred offset | ||
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− | | 8 | + | | style="text-align:center;" | 8 |
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[[Current Mirrors]] | [[Current Mirrors]] | ||
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− | [[220-A8.1]]: Amplifier output swing | + | * [[220-A8.1]]: Amplifier output swing |
− | [[220-A8.2]]: Gain-boosted current mirror frequency response | + | * [[220-A8.2]]: Gain-boosted current mirror frequency response |
− | [[220-A8.3]]: | + | * [[220-A8.3]]: Basic common-mode feedback circuits |
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[[The Folded-Cascode OTA]] | [[The Folded-Cascode OTA]] | ||
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+ | * [[220-A9.1]]: Biasing the folded-cascode OTA | ||
+ | * [[220-A9.2]]: Folded-cascode small- and large-signal gain | ||
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[[Feedback and Stability]] | [[Feedback and Stability]] | ||
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+ | * [[220-A10.1]]: Folded-cascode OTA loop gain | ||
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[[Amplifier Settling]] | [[Amplifier Settling]] | ||
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+ | * [[220-A11.1]]: Folded-cascode OTA noise analysis | ||
+ | * [[220-A11.2]]: Folded-cascode OTA linear and non-linear settling | ||
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[[An Amplifier Design Example]] | [[An Amplifier Design Example]] | ||
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+ | * [[220-A12.1]]: Folded-cascode OTA design mini-project | ||
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[[EE 220 Project]] | [[EE 220 Project]] | ||
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+ | * [[220-A13.1]]: Design project specifications | ||
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[[EE 220 Project]] | [[EE 220 Project]] |
Latest revision as of 11:20, 11 October 2021
- Analog Integrated Circuits
- Semester Offered: 1st semester
- Course Credit: Lecture: 4 units (3 units lecture, 1 unit lab)
Catalog Description
Integrated circuit devices and modeling. Noise analysis and modeling. Review of basic operational amplifier design and compensation. Advanced current mirrors and operational amplifiers. Operational transconductance amplifiers. Common-mode feedback circuits. Comparators. Sample and holds. Voltage references and translinear circuits. Discrete-time signals. Switched-capacitor circuits. Co-req: CoE 143 or equiv. 6h (3 lec, 3 lab) 4 u.
Syllabus
Module | Topics | Outcomes | Resources | Activities |
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1 |
CMOS Technology and Fabrication
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Model-Based Analog Circuit Design
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Operational Transconductance Amplifiers (OTAs)
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11 |
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References
- Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
- Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.
- Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.
- The Design of CMOS Radio-Frequency Integrated Circuits, Thomas H. Lee, 2nd Ed., Cambridge University Press, 2003.
- The Designers Guide to SPICE & SPECTRE, K. S. Kundert, Kluwer Academic Press, 1995.
- Operation and Modeling of the MOS Transistor, Y. Tsividis, McGraw-Hill, 2nd Edition, 1999.