Model-Based Analog Circuit Design

Being able to analyze and design analog circuits using "hand analysis" allows us to build intuition, and this intuition enables us to create designs that are optimal and innovative. However:

• Our simple models such as the square-law model or velocity-saturation model, cannot accurately describe the behavior of key parameters such as output resistance, $r_{o}$, or completely misses operating regions such as the moderate inversion region.
• Using more accurate and complex models, such as BSIM, is ideal for verification, but not really suited for "hand analysis" since:
  • We have to work with hundreds of parameters per transistor, or
  • Make many assumptions to reduce these parameters, but then only ending up in the same situation as using the simple models.

One solution around this problem is to use the simulator, in conjunction with the BSIM models, as a "calculator".

Small-Signal Model

In circuit design, we are normally interested in the following parameters:

Parameter	Components
Gain	$g_{m}$, $r_{o}$
Bandwidth	$g_{m}$, $C_{GS}$, $C_{GD}$, etc.
Power	$I_{D}$
Voltage Swing	$V_{DS,\min }$
Noise	$g_{m}$, $a_{0}$, $C_{load}$, etc.

It turns out we can most of these small-signal parameters by using our BSIM models as lookup tables, since our small signal equations remain the same:

$i_{ds}={\frac {\partial I_{D}}{\partial V_{GS}}}\cdot v_{gs}+{\frac {\partial I_{D}}{\partial V_{BS}}}\cdot v_{bs}+{\frac {\partial I_{D}}{\partial V_{DS}}}\cdot v_{ds}=g_{m}v_{gs}+g_{mb}v_{bs}+g_{ds}v_{ds}$

(1)

Where $g_{m}$ is the device transconductance, $g_{mb}$ is the device body (effect) transconductance, or backgate transconductance, and $g_{ds}={\tfrac {1}{r_{o}}}$ is the output conductance. We can then determine the required small-signal parameters from our design specifications, and use our "calculator" (simulator + BSIM models) to determine how we can get these small-signal parameters.

Intrinsic Transistor Gain

Figure 1: The intrinsic transistor gain as a function of $V_{DS}$ for different channel lengths.

As we have seen in the module on MOS Transistors, accurately describing the transistor output resistance with a simple model is rather difficult. In most cases, however, we use $r_{o}$ to predict the intrinsic transistor gain, $a_{o}=g_{m}r_{o}$. If we are more interested in $a_{o}$, we can use the simulator to determine the maximum or intrinsic transistor gain as a function of $V_{DS}$, which in this case, is a proxy for output swing.

Fig. 1 shows the behavior of $a_{o}$ as a function of $V_{DS}$ for different channel lengths. They key observations here are:

• The gain increases as we increase the channel length. This is the reason for the common use of $L=3L_{\min }$ for analog circuits.
• The gain drops as $V_{DS}$ is lowered, reducing $r_{o}$ when the transistor moves into the triode region. More on this and output swing later.

Activity A4.1 The MOS Intrinsic Gain -- This activity walks through the steps in obtaining the intrinsic transistor gain for a fixed drain current while varying the drain-to-source voltage of an NMOS transistor.

Efficiency Metric: ${\tfrac {g_{m}}{I_{D}}}$

Figure 2: The plot of ${\tfrac {g_{m}}{I_{D}}}$ as a function of $V_{GS}$ for a $V_{DS}=1\mathrm {V}$.

Aside from contributing to the intrinsic transistor gain, the transconductance, $g_{m}$, also affects the transistor frequency response and noise performance. We want to determine the trade-offs involved in generating a particular transconductance value.

Consider the square-law MOSFET model, where $I_{D}={\frac {\mu _{n}C_{ox}}{2}}\cdot {\frac {W}{L}}\cdot \left(V_{GS}-V_{th}\right)^{2}$. Thus, we can get the transconductance as:

$g_{m}={\frac {\partial I_{D}}{\partial V_{GS}}}=\mu _{n}C_{ox}\cdot {\frac {W}{L}}\cdot \left(V_{GS}-V_{th}\right)={\frac {2\cdot I_{D}}{V_{GS}-V_{th}}}={\frac {2\cdot I_{D}}{V_{od}}}$

(2)

Where $V_{od}=V_{GS}-V_{th}$ is the overdrive voltage. We can then define transconductance efficiency as

${\frac {g_{m}}{I_{D}}}={\frac {2}{V_{GS}-V_{th}}}={\frac {2}{V_{od}}}$

(3)

We can think of ${\tfrac {g_{m}}{I_{D}}}$ as the amount of $g_{m}$ we can get from a certain DC drain current, and hence, for a certain DC power draw. Thus, a higher value of ${\tfrac {g_{m}}{I_{D}}}$, the more $g_{m}$ you get for the same $I_{D}$. Note that this is a DC metric, and does not take into account any dynamic or frequency dependent characteristics.

However, real devices are not square-law devices. We can run a simulation to see the behavior of the ${\tfrac {g_{m}}{I_{D}}}$ of a 45nm transistor. The results are then shown in Fig. 2.

Weak Inversion Transconductance

As seen in Fig. 2, the ${\tfrac {g_{m}}{I_{D}}}$ curve tapers off at low $V_{GS}$. This is due to the MOSFET moving into the weak inversion region, where the drain current can be expressed as:

$I_{D}\approx {\frac {W}{L}}\cdot e^{\frac {q\left(V_{GS}-V_{th}\right)}{nkT}}$

(4)

Deriving the transconductance, we get:

$g_{m}={\frac {\partial I_{D}}{\partial V_{GS}}}={\frac {{\frac {W}{L}}\cdot e^{\frac {q\left(V_{GS}-V_{th}\right)}{nkT}}}{n\cdot {\frac {kT}{q}}}}={\frac {I_{D}}{n\cdot V_{T}}}$

(5)

Then calculating ${\tfrac {g_{m}}{I_{D}}}$ gives us:

${\frac {g_{m}}{I_{D}}}={\frac {1}{n\cdot V_{T}}}$

(6)

For $n=1$, the maximum theoretical value of ${\tfrac {g_{m}}{I_{D}}}$ is around ${\tfrac {1}{V_{T}}}\approx 40\mathrm {V^{-1}}$. As expected, for typical submicron transistors with $n>1$, the maximum value is less than $40\mathrm {V^{-1}}$, as seen in Fig. 2.

Activity A4.2: Simulating ${\tfrac {g_{m}}{I_{D}}}$

Efficiency as a Design Parameter

Since we can always determine the values of $g_{m}$ and $I_{D}$ via simulations, we can choose a particular the transconductance efficiency, and from there, determine $I_{D}$ given $g_{m}$.

Note that ${\tfrac {g_{m}}{I_{D}}}$ has units of $\mathrm {V^{-1}}$ (pronounced per volt), which is somewhat hard to interpret physically.

Figure of Merit: $V^{*}$

To avoid this awkward unit, we can redefine our transconductance efficiency in terms of a new metric, $V^{*}$, where

$V^{*}={\frac {2I_{D}}{g_{m}}}$

(7)

Note that $V^{*}$ has units of volts, and as an example, for ${\tfrac {g_{m}}{I_{D}}}=10\,\mathrm {V^{-1}}$, we get $V^{*}=200\,\mathrm {mV}$.

For square-law devices, we see that $V^{*}=V_{GS}-V_{th}=V_{od}$, and that

$g_{m}={\frac {2I_{D}}{V_{GS}-V_{th}}}={\frac {2I_{D}}{V^{*}}}$

(8)

However, real devices do not obey the square law. Let us tabulate the characteristics of $V_{od}$ vs. $V^{*}$ in the table below:

$V_{od}=V_{GS}-V_{th}$	$V^{*}={\tfrac {2I_{D}}{g_{m}}}$
Cannot be measured since $V_{th}$ cannot be measured. Complex models/equations are needed to describe it accurately	Easily measured or simulated since we can easily determine $I_{D}$ and $g_{m}$. Complex models/equations are needed to describe it accurately

"Long-Channel" Devices

In square-law or "long-channel" devices, the following interpretations of $V^{*}$ are true:

• $V^{*}=V_{od}=V_{DS,\mathrm {sat} }$, and thus is the boundary between the triode and saturation regions.
  • This is also the boundary between the changes in $C_{GS}$ and $C_{GD}$ from triode and saturation ("pinch-off").
• $I_{D}\approx \left(V^{*}\right)^{2}$
• The output resistance, $r_{o}$, is large for $V_{DS}>V^{*}$.

Short-Channel Devices

In short-channel devices, all interpretations of $V^{*}$ are only approximations, except:

• $V^{*}={\tfrac {2I_{D}}{g_{m}}}$
• In general, $V^{*}\neq V_{DS,\mathrm {sat} }$

Activity A4.3: Design of a Simple Common-Source Amplifier