CoE 197U The CMOS Inverter

To understand the analysis and design of digital circuits, we will look at its fundamental element -- the digital gate. We will start with the simplest digital gate, the inverter.

The Inverter Voltage Transfer Characteristics (VTC)

The functionality of the inverter can be captured by looking at the output voltage as we change the input voltage, or the voltage-transfer characteristic (VTC).

The Ideal Inverter VTC

Let us define an ideal inverter, where:

$v_{O}={\begin{cases}V_{H},&{\text{if }}v_{I}<V_{REF}\\V_{L},&{\text{if }}v_{I}\geq V_{REF}\end{cases}}$

(1)

Where $V_{H}$ is logic 1 voltage level, and in general may or may not be equal to the positive supply voltage, $V_{+}$, and $V_{L}$ is logic 0 voltage level, and in general may or may not be equal to the negative supply voltage, $V_{-}$. The VTC of this ideal inverter, as well as the standard inverter circuit symbol, is shown in Fig. 1.

Figure 1: The ideal inverter voltage transfer characteristic (VTC).

One implementation of the inverter is to use a single NMOS transistor and a resistor, as shown in Fig. 2. Using our switch model for the NMOS transistor, we can see that when the input is low or at logic 0, the output is pulled up to $V_{DD}$ since the switch is open. When the input voltage is equal to $V_{DD}$, the switch is closed and the output is pulled down close to ground. For a finite on switch resistance, $R_{ON}$, the output voltage becomes:

$v_{O}={\frac {R_{ON}}{R_{ON}+R}}\cdot V_{DD}$

(2)

Figure 2: The NMOS inverter.

Figure 3: The CMOS inverter.

Static Design Metrics

In real inverters, the VTC can deviate from the ideal

Figure : The non-ideal inverter voltage transfer characteristic (VTC).

Figure : The CMOS inverter voltage transfer characteristic (VTC).

Inverter Delay

Figure: Logic delay definitions .

Power Dissipation

Figure : The CMOS switching current.

Figure : The CMOS transient power dissipation.