CoE 197U The MOS Switch

From Microlab Classes
Revision as of 14:30, 4 March 2021 by Louis Alarcon (talk | contribs)
Jump to navigation Jump to search

Levels of Abstraction

Figure 1: Levels of abstraction[1].

What is a Transistor?

Figure 2: The 45nm NMOS PTM[2] output characteristics.

The Ideal Switch

The Switch Model of a Transistor

NMOS vs. PMOS Transistors

References

  1. A. Ghosh, Fault Modeling in Chip Design - VLSI DFT, 2020 (link)
  2. Arizona State University Predictive Technology Models (PTM) website