CMOS Technology and Fabrication
Revision as of 12:05, 12 September 2020 by Louis Alarcon (talk | contribs) (→CMOS Technology Review)
Welcome to EE 220!
Since we are offering this class remotely, there will be many changes to our normal course delivery:
- There will be no face-to-face lecture classes. All the material will be made available via this site.
- There will be more emphasis on student-centric activities, e.g. analysis, design, and simulations. Thus, you will be mostly "learning by doing". In this context, we will set aside an hour every week for consultations and questions via video-conferencing.
- Grades will be based on the submitted deliverables from the activities. Though we will not be very strict regarding the deadlines, it is a good idea to keep up with the class schedule and avoid cramming later in the semester.
Please remember that this semester is very different from those before, and please make sure you inform me if you have any issues or difficulties regarding the class. Also, keep in mind that you will need to pay a bit more attention to your time management as it will play a critical role during the course of the semester.
Let's get started!
CMOS Technology Review
Knowing how integrated devices are fabricated, and how the fabrication process affects the characteristics and performance of these devices, is one of the pillars of good analog circuit design.
Sources
- Phillip Allen's slides on CMOS fabrication.
