220-A1.1

From Microlab Classes
Revision as of 22:28, 13 September 2020 by Louis Alarcon (talk | contribs) (→‎Video)
Jump to navigation Jump to search
  • Activity: IC Fabrication
  • Instructions: In this activity, you are tasked to
    • Watch a short video about integrated circuit (IC) fabrication.
    • Read a paper on CMOS scaling, and an article on the history of analog design.
    • Write a short (1-page) report.
  • Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
  • At the end of this activity, the student should be able to:
  1. Enumerate and explain the key steps and technologies involved in fabricating integrated circuits.
  2. Explain why there is a concern about the future of CMOS technology.

Video

After watching the video, go over Phillip Allen's slides on CMOS fabrication. This is a good simplified overview of the modern IC fabrication process.

Paper/Article Reading

  • T. Skotnicki, J. A. Hutchby, Tsu-Jae King, H. -. P. Wong and F. Boeuf, The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance, in IEEE Circuits and Devices Magazine, vol. 21, no. 1, pp. 16-26, Jan.-Feb. 2005, doi: 10.1109/MCD.2005.1388765.
    • You can access this paper for free via the UPEEEI VPN service. If you cannot access the IEEE link via the UPEEEI VPN, you can also access this via this link.
  • S. Taranovich, Analog: back to the future, EDN Online, June 2012, (part 1,part 2, part 3)

VPN Access

For questions on UPEEEI VPN access, please send an email to EEEI Support:   @

Report Guide

Based on the video you watched, the papers (not limited to the two papers above) you have read, and any other resource that is available to you, write a short (1-2 page) report on what you think would be the key challenges IC designers will face in the near future, and why.

Submission

Submit your reports via email, before starting Module 2.