CoE 197U MOS Differential Pairs

The differential pair is one of the most commonly used circuit blocks in analog IC design. It enables amplifiers to have not just two, but specifically, differential inputs and act based only or mostly on the difference of the input signals.

The main references for this topic are chapters 3.5 and 4.3.5 of the Analysis and Design of Analog Integrated Circuits book.

Fully Differential Amplifier Signal and Gain Definitions

Before proceeding, the voltage signals to be dealt with need to be defined first to aid in the discussion. We will look at a general fully differential amplifier with a differential input and a differential output. The differential input/output voltages are the difference of input/output voltages. The common-mode input/output voltages are the average of the input/output voltages. Given how $v_{1}$, $v_{2}$, $v_{d}$, and $v_{d}$ are related (Fig. 1), knowledge of any two can be used to infer the remaining two.

Fig. 1Fully Differential Amplifier Voltage Definitions

Fig. 2 Fully Differential Amplifier Voltage Gain Definitions

Fig. 3 Cancellation of Common-mode Noise in Differential Signal

The presence of differential and common-mode inputs and outputs require a clarification on how the gains are defined (Fig. 2). An ideal fully differential amplifier will have a very large $A_{dm}$ and very low $A_{cm}$, as the arrows' thickness suggests. $A_{cm-dm}$ and $A_{dm-cm}$ are also ideally very low. $A_{cm-dm}$ and $A_{dm-cm}$ are both zero if the circuit is perfectly balanced, which requires that components are perfectly matched in terms of device properties and bias.

The advantage of having a differential input is the ability to reject signals that are common to both inputs such as noise that is coupled to both input signals. As can be seen in Fig. 3, the noise present on both inputs, $v_{1}$ and $v_{2}$, does not appear at the differential signal $v_{d}$. If indeed the differential pair works only on this differential input signal, then the noise will not be amplified with the actual input information. The same property also allows the circuit to be less sensitive to the DC offset of the two signals. This makes differential amplifiers easy to cascade without the need for AC-coupling capacitors, which generally need to be large and are costly in IC implementations. However, care is still needed when dealing with large signal swings and/or small supply voltages.

DC and Large Signal Analysis

The MOS differential pair or the source-coupled pair is shown in Figs. 4a and 4b. In source-coupled pairs, the source nodes are tied together. The current source is referred to as the tail current source. A simple but crude way of providing current to the differential pair is by using a tail resistor instead of a current source.

Figure 4a: MOS differential pair with tail current source bias

Figure 4b: MOS differential pair with tail resistor bias

Figure 5: MOS differential pair drain currents vs. differential input voltage

Assume that the transistors are perfectly matched/identical. Assume also that anything connected above the drain terminals are perfectly balanced or symmetric. For the DC analysis, assume that $\lambda \rightarrow 0$ for simplicity to highlight the basic operation of the circuit.

Consider the differential pair with a tail current source (Fig. 4a). When there is no differential input, then the input voltages $V_{I1}$ and $V_{I2}$ must exactly be equal at some common-mode voltage $V_{Ic}$. By virtue of symmetry, the transistors must have the same current, i.e. $I_{D1}=I_{D2}=I_{T}/2$. Such is the case without even taking note of what is the actual $V_{IC}$. If $V_{IC}$ should change, $V_{X}$ adjusts to maintain the Vgs that corresponds to $I_{D}=I_{T}/2$. Since $g_{m}$ can be inferred from the transistor dimensions and the DC current, which are both constant, then $g_{m}$ is maintained even if $V_{IC}$ changes, again, under the assumption that $\lambda \rightarrow 0$ or $r_{o}$ is very large.

The large signal characteristics of the MOS differential pair analysis is started by setting up a KVL equation from $V_{I1}$ to $V_{I2}$ and relating it to currents $I_{D1}$ and $I_{D1}$, under the restriction that $I_{D1}+I_{D2}=I_{T}$. The following equations are valid given that the two transistors are saturated.

For $|V_{id}|<V_{id,max}={\sqrt {\frac {2I_{T}}{k'{\frac {W}{L}}}}}$:

$I_{D1}={\frac {I_{T}}{2}}+{\frac {k'}{4}}{\frac {W}{L}}V_{id}{\sqrt {{\frac {4I_{T}}{k'{\frac {W}{L}}}}-V_{id}^{2}}}$

(1)

$I_{D2}={\frac {I_{T}}{2}}-{\frac {k'}{4}}{\frac {W}{L}}V_{id}{\sqrt {{\frac {4I_{T}}{k'{\frac {W}{L}}}}-V_{id}^{2}}}$

(2)

When $|V_{id}|>V_{id,max}$, all of $I_{T}$ will flow only through one transistor while the other transistor will be in cut-off. This is shown in Fig. 5. Thus, the tail current is effectively steered or distributed between M1 and M2 by $V_{id}$, regardless of the $V_{ic}$ as long as the transistors are saturated and the current source is still operating as intended.

Figure 6: MOS differential pair with resistor load

Figure 7: Vod vs. Vid of differential amplifier with resistor load

Assuming that the load is a pair of equal and matched resistors such in Fig. 6, the output voltage is determined by KVL (Eq. 3) and the difference in drain currents (Eqs. 1 and 2). The resulting expression is Eq. 4. The plot of this function is the middle portion of Fig. 7.

$V_{od}=V_{o1}-V_{o2}=(V_{CC}-I_{D1}R_{D})-(V_{CC}-I_{D2}R_{D})$

(3)

For $|V_{id}|<V_{id,max}$:

$V_{od}=-R_{D}{\frac {k'}{2}}{\frac {W}{L}}V_{id}{\sqrt {{\frac {4I_{T}}{k'{\frac {W}{L}}}}-V_{id}^{2}}}$

(4)

Beyond $|V_{id,max}|$ the currents rail, and therefore, the differential output voltage also rail. Fig. 7 also shows that the amplifier has an inverting gain.