Difference between revisions of "CoE 197U The MOS Switch"

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Revision as of 14:25, 4 March 2021

Levels of Abstraction

Figure 1: Levels of abstraction[1].

What is a Transistor?

The Switch Model of a Transistor

Figure 2: The 45nm NMOS PTM[2] output characteristics.

NMOS vs. PMOS Transistors

References

  1. A. Ghosh, Fault Modeling in Chip Design - VLSI DFT, 2020 (link)
  2. Arizona State University Predictive Technology Models (PTM) website