Difference between revisions of "CoE 197U The MOS Switch"

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== Levels of Abstraction ==
 
== Levels of Abstraction ==
 
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|[[File:Levels of abstraction.png|thumb|800px|Figure 1: Levels of abstraction<ref name="ghosh2020">A. Ghosh, Fault Modeling in Chip Design - VLSI DFT([https://technobyte.org/fault-modeling-models-vlsi-dft/ link])</ref>.]]
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|[[File:Levels of abstraction.png|thumb|800px|Figure 1: Levels of abstraction<ref name="ghosh2020">A. Ghosh, Fault Modeling in Chip Design - VLSI DFT, 2020 ([https://technobyte.org/fault-modeling-models-vlsi-dft/ link])</ref>.]]
 
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Revision as of 15:58, 1 March 2021

Levels of Abstraction

Figure 1: Levels of abstraction[1].

What is a Transistor?

The Switch Model of a Transistor

NMOS vs. PMOS Transistors

References

  1. A. Ghosh, Fault Modeling in Chip Design - VLSI DFT, 2020 (link)