229-A2.2

Activity: Noise Analysis

• Instructions: This activity is structured as a tutorial with a design problem at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
• At the end of this activity, the student should be able to:

1. Understand and observe the effects of noise in electronic circuits.

Example: Simulating the Noise of a Resistor

Figure 1: A simple RC circuit.

Consider a simple RC circuit shown in Fig. 1. The noise generated by the resistor is:

${\overline {v_{R}^{2}}}=4kTR\Delta f$

(1)

Thus, for a resistor $R=1\mathrm {k\Omega }$ and a temperature $T=300K$, and with $k=1.38\times 10^{-23}\mathrm {\tfrac {J}{K}}$, the spot noise is equal to:

${\frac {\overline {v_{R}^{2}}}{\Delta f}}=4kTR=1.66\times 10^{-17}\mathrm {\frac {V^{2}}{Hz}}$

(2)

Thus, for a capacitor $C=1\mathrm {\mu F}$, the total output integrated noise, shaped by the transfer function of the RC circuit is:

${\overline {v_{o,T}^{2}}}=\int _{0}^{\infty }4kTR\cdot \left|{\frac {1}{1+sRC}}\right|^{2}df={\frac {kT}{C}}=4.144\times 10^{-15}\mathrm {V^{2}}$

(3)

Or equivalently,

$v_{o,\mathrm {rms} }={\sqrt {\overline {v_{o,T}^{2}}}}=64.4\mathrm {nV}$

(4)

If we change the value of the resistor to $R=10\mathrm {k\Omega }$, the resistor spot noise changes to:

${\frac {\overline {v_{R}^{2}}}{\Delta f}}=4kTR=1.66\times 10^{-16}\mathrm {\frac {V^{2}}{Hz}}$

(5)

But the total integrated noise should remain the same since the bandwidth of the RC circuit is reduced by the same amount. To verify our calculations, we can use SPICE to simulate the noise of the RC circuit. Using this netlist and this Python script, we get the following ngspice results:

******
** ngspice-31 : Circuit level simulation program
** The U. C. Berkeley CAD Group
** Copyright 1985-1994, Regents of the University of California.
** Please get your ngspice manual from http://ngspice.sourceforge.net/docs.html
** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html
******
ngspice 1 -> source RC_noise.sp

Circuit: * noise simulations

Doing analysis at TEMP = 27.000000 and TNOM = 27.000000


No. of Data Rows : 9001

No. of Data Rows : 1
onoise_total = 4.143579e-15
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000


No. of Data Rows : 9001

No. of Data Rows : 1
onoise_total = 4.143808e-15
ngspice 2 ->

Note that since the noise voltages and currents are relatively small, we need to adjust the SPICE calculation tolerances, as was done in our netlist. We can use our Python script to plot the output noise spectral density, as shown in Fig. 2, and the root spectral density, seen in Fig. 3.

Figure 2: The power spectral density of the RC circuit.

Figure 3: The root power spectral density of the RC circuit.

As expected, the total integrated output noise is independent of the value of the resistor, and only depends on the value of the capacitor.

Activity: Noise in MOSFETs

Figure 4: A noisy NMOS current mirror.

Let us use the NMOS current mirror in Fig. 4 to simulate the drain current noise in of the 45nm NMOS transistor M1. Using this SPICE netlist and Python script, we can plot the power spectral density and root spectral density of the drain current, as shown in Figs. 5 and 6, for three different sizes. Note that we did not include the resistor noise in the simulation using the noisy=0 directive.

Figure 5: The NMOS output voltage noise spectral density.

Figure 6: The NMOS output voltage noise root spectral density.

1. Are the plots in Figs. 5 and 6 what you expect given the three different transistor sizes? Explain.
2. Show that the capacitor $C_{\infty }$ prevents the noise of M2 from reaching M1.
3. Using the the simulation data, estimate the values of ${\tfrac {\gamma }{\alpha }}$ and ${\tfrac {K_{f}}{C_{\mathrm {ox} }}}$, assuming $\alpha =1$ and $e=1$.
4. Calculate the value of the noise corner frequency, $f_{c}$, and compare this with the simulation data.
5. Derive an expression for the total output integrated voltage noise, ${\overline {v_{o,T}^{2}}}$. Is this consistent with the simulation results? What are the possible sources of error? Ignore the terminal resistances for now.
6. Repeat the activity for a 45nm PMOS transistor. Note that you need to create a PMOS current mirror, and set the drain currents to approximately the same values as their NMOS counterparts.

Report Guide

Write a short report explaining your answers to the questions above, and submit it via email.