Difference between revisions of "Integrated Capacitors"
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Similar to resistors, in a CMOS process optimized for digital circuits, capacitances are treated as parasitic devices that degrade the performance of digital circuits, except in specialized cases such as memory circuits. However, in analog design, we often need capacitors with very well-controlled capacitance values. | Similar to resistors, in a CMOS process optimized for digital circuits, capacitances are treated as parasitic devices that degrade the performance of digital circuits, except in specialized cases such as memory circuits. However, in analog design, we often need capacitors with very well-controlled capacitance values. | ||
| − | == | + | == Capacitance Geometries == |
| + | The parallel-plate capacitance, shown in Fig. 1, is given by: | ||
| + | |||
| + | {{NumBlk|::|<math>C = \frac{\epsilon A}{t} = \frac{\epsilon}{t}\cdot w\cdot \ell</math>|{{EquationRef|1}}}} | ||
| + | |||
| + | Where <math>\epsilon</math> is the permittivity of the dielectric or insulating material, <math>t</math> is the thickness of the dielectric, and <math>A = w\cdot \ell</math> is the overlap area of the parallel-plate. | ||
=== Parasitic Capacitances === | === Parasitic Capacitances === | ||
Revision as of 04:55, 22 September 2020
Similar to resistors, in a CMOS process optimized for digital circuits, capacitances are treated as parasitic devices that degrade the performance of digital circuits, except in specialized cases such as memory circuits. However, in analog design, we often need capacitors with very well-controlled capacitance values.
Contents
Capacitance Geometries
The parallel-plate capacitance, shown in Fig. 1, is given by:
-
(1)
-
Where is the permittivity of the dielectric or insulating material, is the thickness of the dielectric, and is the overlap area of the parallel-plate.
