Difference between revisions of "Passive CMOS Devices"

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{{NumBlk|::|<math>R = \frac{\rho \cdot \ell}{A} = \frac{\rho}{t}\frac{\ell}{w}= R_\mathrm{sh} \frac{\ell}{w}</math>|{{EquationRef|1}}}}
 
{{NumBlk|::|<math>R = \frac{\rho \cdot \ell}{A} = \frac{\rho}{t}\frac{\ell}{w}= R_\mathrm{sh} \frac{\ell}{w}</math>|{{EquationRef|1}}}}
  
Where <math>R_\mathrm{sh}</math> is the ''sheet resistance'' of the layer, <math>\rho</math> is the resistivity of the material, <math>\ell</math> is the length along the direction of the current, <math>A = w\cdot t</math> is the cross sectional area normal to the current flow, which is equal to the product of the layer thickness, <math>t</math> and the width of the layer perpednicular to the current flow.
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Where <math>R_\mathrm{sh}</math> is the ''sheet resistance'' of the layer, <math>\rho</math> is the resistivity of the material, <math>\ell</math> is the length along the direction of the current, and <math>A = w\cdot t</math>, is the cross sectional area normal to the current flow, which is equal to the product of the layer thickness, <math>t</math> and <math>w</math> is the width of the layer perpendicular to the current flow. The table below shows indicative values of the common conductive layers in a CMOS process:
 +
 
 +
{| class="wikitable"
 +
! Layer
 +
! Sheet Resistance
 +
|-
 +
| Metal
 +
| <math>50-70\,\mathrm{\frac{m\Omega}{\square}} \pm 30\mathrm{%}</math>
 +
|-
 +
| Polysilicon
 +
| <math>5\,\mathrm{\frac{\Omega}{\square}}</math>
 +
|-
 +
| <math>n^+</math> or <math>p^+</math> Diffusion
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| <math>5\,\mathrm{\frac{\Omega}{\square}}</math>
 +
|-
 +
| <math>n</math>-well
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| <math>1-5\,\mathrm{\frac{k\Omega}{\square}} \pm 40\mathrm{%}</math>
 +
|-
 +
|}
  
 
== Capacitors ==
 
== Capacitors ==
  
 
== Inductors ==
 
== Inductors ==

Revision as of 20:31, 20 September 2020

Passive devices such as resistors, capacitors, and inductors, are commonly used in biasing circuits, feedback networks, and signal or energy storage blocks. However, these passive devices, when built on fabrication processes that are optimized for transistors, may have characteristics different from their ideal or discrete counterparts. In this module, we examine the behavior of passive devices built alongside CMOS transistors.

Resistors

In standard digital CMOS processes, there is usually no provision for high resistance layers, since resistances are typically deemed bad for digital circuits. But in analog design, we often need well-controlled resistors, with relatively large resistance values. In order to evaluate if a particular layer could be used as to build a resistor, we look to their sheet resistance. Recall that for a resistor:

 

 

 

 

(1)

Where is the sheet resistance of the layer, is the resistivity of the material, is the length along the direction of the current, and , is the cross sectional area normal to the current flow, which is equal to the product of the layer thickness, and is the width of the layer perpendicular to the current flow. The table below shows indicative values of the common conductive layers in a CMOS process:

Layer Sheet Resistance
Metal
Polysilicon
or Diffusion
-well

Capacitors

Inductors