Difference between revisions of "SKY130 Models"

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== Step 2: ==
 
== Step 2: ==
After installing git, you can clone the SKY130 libraries into a directory (e.g. <code>/home/louis/git/sky130</code>) in your filesystem by:
+
After installing git, you can clone the SKY130 libraries into a directory, e.g. <code>/home/louis/git/sky130</code> in your filesystem, assuming <code>/home/louis/git</code> (or your equivalent home directory) already exists, by:
  
 
<div style="margin-left: 2em;">
 
<div style="margin-left: 2em;">
Line 27: Line 27:
 
</div>
 
</div>
  
Since these are relatively complex, the models are not native transistors, but subcircuits. So to instantiate a low threshold voltage (LVT) 1.8V NMOS transistor with a width of 1um and a length of 0.5um, you will need to use the 'x' device prefix instead of the 'm' prefix:
+
Since these are relatively complex, the models are not native transistors, but subcircuits. So to instantiate a low threshold voltage (LVT) 1.8V NMOS transistor with a width of 1&mu;m and a length of 0.5&mu;m, you will need to use the 'x' device prefix instead of the 'm' prefix:
  
 
<div style="margin-left: 2em;">
 
<div style="margin-left: 2em;">
 
<source lang="bash">
 
<source lang="bash">
 
xm1 d1 g1 0 0 sky130_fd_pr__nfet_01v8_lvt w=1 l=0.5
 
xm1 d1 g1 0 0 sky130_fd_pr__nfet_01v8_lvt w=1 l=0.5
 +
</source>
 +
</div>
 +
 +
Thus, a complete SPICE deck for obtaining the transfer and output characteristics of the 1.8V LVT NMOS would look like:
 +
 +
<div style="margin-left: 2em;">
 +
<source lang="bash">
 +
* NMOS Transfer and Output Characteristics
 +
* Generated 10-Oct-2021 10:31:26
 +
* Include SkyWater sky130 device models
 +
.lib "/home/louis/git/sky130/skywater-pdk-libs-sky130_fd_pr/models/sky130.lib.spice" tt
 +
.option scale=1e-6
 +
xm1 d1 g1 0 0 sky130_fd_pr__nfet_01v8_lvt w=1 l=0.5
 +
vgs g1 0 dc=0.9
 +
vds d1 0 dc=0.9
 +
.control
 +
dc vgs 0 1.8 0.01
 +
wrdata nmos_01v8_transfer_tt.dat -i(vds)
 +
dc vds 0 1.8 0.01
 +
wrdata nmos_01v8_output_tt.dat -i(vds)
 +
.endc
 +
.end
 +
</source>
 +
</div>
 +
 +
The cells available in this process design kit (PDK) are found in:
 +
 +
<div style="margin-left: 2em;">
 +
<source lang="bash">
 +
/home/louis/git/sky130/skywater-pdk-libs-sky130_fd_pr/cells
 
</source>
 
</source>
 
</div>
 
</div>

Latest revision as of 12:41, 11 October 2021

Step 1:

Installing the SkyWater SKY130 130nm CMOS models from the Github repository requires installing git. You can also just got to the SkyWater github page and just download the files as one zip file.

Step 2:

After installing git, you can clone the SKY130 libraries into a directory, e.g. /home/louis/git/sky130 in your filesystem, assuming /home/louis/git (or your equivalent home directory) already exists, by:

cd ~/git
mkdir ./sky130
cd ./sky130
git clone https://github.com/google/skywater-pdk-libs-sky130_fd_pr.git

Note that if you downloaded the zip file instead, you should get the same directory structure by uncompressing the zip file into your local directory (e.g. /home/louis/git/sky130).

Step 3:

To instantiate SKY130 devices into your SPICE deck, add the following commands to access the typical (tt) model corner:

* Include SkyWater sky130 device models
.lib "/home/louis/git/sky130/skywater-pdk-libs-sky130_fd_pr/models/sky130.lib.spice" tt
.option scale=1e-6

Since these are relatively complex, the models are not native transistors, but subcircuits. So to instantiate a low threshold voltage (LVT) 1.8V NMOS transistor with a width of 1μm and a length of 0.5μm, you will need to use the 'x' device prefix instead of the 'm' prefix:

xm1	d1 g1 0 0	sky130_fd_pr__nfet_01v8_lvt w=1 l=0.5

Thus, a complete SPICE deck for obtaining the transfer and output characteristics of the 1.8V LVT NMOS would look like:

* NMOS Transfer and Output Characteristics
* Generated 10-Oct-2021 10:31:26
* Include SkyWater sky130 device models
.lib "/home/louis/git/sky130/skywater-pdk-libs-sky130_fd_pr/models/sky130.lib.spice" tt
.option scale=1e-6
xm1	d1 g1 0 0	sky130_fd_pr__nfet_01v8_lvt w=1 l=0.5
vgs	g1 0		dc=0.9
vds	d1 0		dc=0.9
.control
dc vgs 0 1.8 0.01
wrdata nmos_01v8_transfer_tt.dat -i(vds)
dc vds 0 1.8 0.01
wrdata nmos_01v8_output_tt.dat -i(vds)
.endc
.end

The cells available in this process design kit (PDK) are found in:

/home/louis/git/sky130/skywater-pdk-libs-sky130_fd_pr/cells