Difference between revisions of "CoE 197U"

From Microlab Classes
Jump to navigation Jump to search
Line 31: Line 31:
 
|
 
|
 
* [[CoE197U-A1.1]]: IC Fabrication and Scaling
 
* [[CoE197U-A1.1]]: IC Fabrication and Scaling
 +
* [https://drive.google.com/drive/folders/1PFmtjlx1usOf73PzcLBfkcS8VhDb2Pz8?usp=sharing Lab 00]: Introduction to LTspice
 
|-
 
|-
 
| style="text-align:center;" | 2
 
| style="text-align:center;" | 2
Line 44: Line 45:
 
|
 
|
 
* [[CoE197U-A2.1]]: MOSFET Characteristics
 
* [[CoE197U-A2.1]]: MOSFET Characteristics
 +
* [https://drive.google.com/drive/folders/1lW3RflMSI0DUz3Rb2CCvzhABtaKJXQRt?usp=sharing Lab 01]: The MOSFET Switch and The Inverter
 
|-
 
|-
 
| style="text-align:center;" | 3
 
| style="text-align:center;" | 3
Line 57: Line 59:
 
* Slides: Logical Effort [https://drive.google.com/file/d/1OmX857DUfy0X_asE1DKYCIrr9TwwMMvX/view?usp=sharing PDF]
 
* Slides: Logical Effort [https://drive.google.com/file/d/1OmX857DUfy0X_asE1DKYCIrr9TwwMMvX/view?usp=sharing PDF]
 
|
 
|
 +
* [https://drive.google.com/drive/folders/1IaQsQZEfm57A4HbENHF_BZrPzi_iwLzQ?usp=sharing Lab 02]: Inverter Characteristics, Ring Oscillator, and Buffers
 
|-
 
|-
 
| style="text-align:center;" | 4
 
| style="text-align:center;" | 4
Line 70: Line 73:
 
* Slides: Interconnects [https://drive.google.com/file/d/1Or0KnHb3v0awBcXZHd8CfN2oEP5l3cRj/view?usp=sharing PDF]
 
* Slides: Interconnects [https://drive.google.com/file/d/1Or0KnHb3v0awBcXZHd8CfN2oEP5l3cRj/view?usp=sharing PDF]
 
|
 
|
 +
* [https://drive.google.com/drive/folders/1HtOJQGC0XJqgDrctXn14LnqV1bDGPJv4?usp=sharing Lab 03] : Static Logic Gates and Power-Delay Product
 
|-
 
|-
 
| style="text-align:center;" | 5
 
| style="text-align:center;" | 5
Line 78: Line 82:
 
|  
 
|  
 
|
 
|
 +
* [https://drive.google.com/drive/folders/1blJPdFy2G7IbzKCFb-2kXf1_vAcJGQ9O?usp=sharing Lab 04] : Basic Memory Devices
 
|-
 
|-
 
| style="text-align:center;" colspan="5" | ''Part II: Analog Integrated Circuits''
 
| style="text-align:center;" colspan="5" | ''Part II: Analog Integrated Circuits''

Revision as of 20:39, 1 March 2021

  • Introduction to Analog and Digital Integrated Circuit Design
  • Semester Offered: 2nd semester
  • Course Credit: Lecture: 3 units (2 units lecture, 1 unit lab)

Catalog Description

IC Fabrication. CMOS gates. Logical Effort. Interconnect. Memory Elements. MOS Amplifiers. Current Sources. Differential Amplifiers. Operational Transconductance Amplifiers. Pre-req: EEE 41 or EEE 131. 5h (2 lec, 3 lab) 3 u.

Syllabus

Module Topics Outcomes Resources Activities
Part I: Digital Integrated Circuits
1
  • Identify the key characteristics and non-idealities of a CMOS fabrication process.
  • Analyze how these key characteristics and non-idealities change the characteristics of the devices that will be built on it.
2
  • Simplify the analysis of a CMOS inverter using switch-level transistor models.
  • Determine key CMOS inverter metrics and understand their significance in the analysis and design process.
3
  • Design CMOS static gates
  • Estimate delays of cascaded logic gates
  • Design multistage networks for optimal speed
  • Slides: CMOS Gates PDF
  • Slides: Logical Effort PDF
  • Lab 02: Inverter Characteristics, Ring Oscillator, and Buffers
4
  • Power and Energy
  • Interconnects
  • Identify sources of power and energy consumption in digital circuits
  • Evaluate energy efficient techniques for digital logic using defined metrics
  • Model interconnects as parasitic resistances and capacitances and estimate corresponding delay
  • Slides: Power and Energy PDF
  • Slides: Interconnects PDF
  • Lab 03 : Static Logic Gates and Power-Delay Product
5
  • Memory Elements
  • Timing
  • Lab 04 : Basic Memory Devices
Part II: Analog Integrated Circuits
6
  • MOS Amplifiers: DC and AC Analysis
  • Determine the DC operating point of MOS amplifiers.
  • Extract the MOS small-signal parameters depending on the DC operating point.
  • Analyze MOS amplifiers in the AC and DC domain.
  • Derive the two-port network representation of MOS amplifiers.
  • Identify the appropriate application of a MOS amplifier topology based on its two-port parameters.
7
  • MOS Amplifiers: Frequency Response
  • Analyze MOS amplifiers in the frequency domain.
  • Sketch the Bode plots of the transfer function.
  • Estimate the dominant pole using ZVTCA.
8
  • Current Sources
  • High-Swing Current Sources
9
  • MOS Differential Pairs
10
  • Two-Stage MOS Operational Transconductance Amplifiers
11
  • Folded Cascode Operational Transconductance Amplifiers
  • Identify the different stages in a folded cascode OTA.
  • Determine the components and/or parameters that affect the DC operating point of a folded cascode OTA.
  • Explain how to design a folded cascode OTA.
12

References

  • Rabaey, Chandrakasan, Nikolic, Digital Integrated Circuits, 2ed., Pearson 2002.
  • Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001.
  • Johns, Martin, Analog Integrated Circuit Design, Wiley 1997.
  • Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.